Enhanced Central processing unit (CPU) architecture with hardware tags blocks security attacks with no overhead

This CPU architecture integrates immutable tags for both instructions and data in registers and memory. During execution, hardware continuously compares these tags—along with explicit control-flow labels—to determine whether to permit or deny operations such as calls, returns, indirect jumps, and memory accesses. Tags can reside inline in binaries, in the instruction cache, or in protected memory. A modified compiler and operating system toolchain (e.g., LLVM with kernel extensions) automatically generates and manages tags. A reference implementation, STAR, demonstrates strong control-flow integrity and pointer validation with only a few percent performance overhead on FPGA prototypes, proving practical, fine-grained enforcement with negligible cost.